1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a differential amplifier circuit capable of compensating an offset value between differential input signals.
2. Description of the Related Art
A differential amplifier circuit amplifies a voltage difference between two different input voltages, and is used in almost all types of integrated circuit chips for receiving an external signal or amplifying an internal signal of the chip. For example, a memory device may include several hundred to thousands differential amplifier circuits.
FIG. 1 is a diagram illustrating a conventional differential amplifier circuit 100.
Referring to FIG. 1, the differential amplifier circuit 100 receives an input signal IN and a complementary input signal INB as the input thereof, and amplifies a voltage difference between the input signal IN and the complementary input signal INB to output an output signal OUT and a complementary output signal OUTB. When the voltage of the input signal IN is higher than the voltage of the complementary input signal INB, the differential amplifier circuit 100 outputs the output signal OUT to a high level and outputs the complementary output signal OUTB to a low level. When the voltage of the complementary input signal INB is higher than the voltage of the input signal IN, the differential amplifier circuit 100 outputs the output signal OUT to a low level and outputs the complementary output signal OUTB to a high level. The differential amplifier circuit 100 receives an enable signal EN and performs the amplification operation when the enable signal EN is activated.
In an ideal case, the differential amplifier circuit 100 may amplify the output signal OUT to a high level and the complementary output signal OUTB to a low level even when the input signal IN is slightly higher than the complementary input signal INB. Also, the differential amplifier circuit 100 may amplify the output signal OUT to a low level and the complementary output signal OUTB to a high level even when the complementary input signal INB is slightly higher than the input signal IN.
However, an actual differential amplifier circuit 100 has an inherent offset between the input signal IN and the complementary input signal INB. The inherent offset may be due to a mismatch of a load resistor in the differential amplifier circuit, a mismatch of a W/L ratio of an input transistor pair in the differential amplifier circuit, a mismatch of a threshold voltage of the input transistor pair in the differential amplifier circuit, or the like. Hence, an actual differential amplifier circuit 100 cannot perform a normal amplification operation when the voltage difference between the input signal IN and the complementary input signal INB is smaller than the inherent offset. The inherent offset is also referred to as a sensing threshold value Vth. For example, when the voltage of the input signal IN is higher than the voltage of the complementary input signal INB but the voltage difference therebetween is not greater than the sensing threshold value Vth, the differential amplifier circuit may perform an abnormal amplification operation of outputting the output signal OUT to a low level and outputting the complementary output signal OUTB to a high level.
FIGS. 2A and 2B are views explaining a normal operation and an abnormal operation of the differential amplifier circuit 100 of FIG. 1.
FIG. 2A illustrates the enable signal EN activated to a high level when a voltage difference (ΔV) between the input signal IN and the complementary input signal INB is greater than or equal to the sensing threshold value Vth of the differential amplifier circuit 100. Hence, in this case, the differential amplifier circuit 100 performs a normal amplification operation.
FIG. 2B illustrates the enable signal EN activated to a high level when the voltage difference (ΔV) between the input signal IN and the complementary input signal INB is smaller than the sensing threshold value Vth of the differential amplifier circuit 100. In this case, the differential amplifier circuit 100 determines that there is no voltage difference between the input signal IN and the complementary input signal INB, and thus cannot perform a normal amplification operation.
As described above, a conventional differential amplifier requires a minimum voltage swing for proper normal operation due to an inherent offset which may cause increased power consumption, sensing delays, and may have a negative effect on the overall performance of the amplifier.
Therefore, it may be advantageous to detect the offset, i.e., the sensing threshold value Vth of a differential amplifier circuit in advance, to activate an enable signal EN when a voltage level difference (ΔV) between an input signal IN and a complementary input signal INB is greater than or equal to the detected threshold sensing voltage value Vth, thereby preventing abnormal operation.